CRAY KOREA Blog
2022. 5. 29. 16:41
2022. 5. 29. 16:41
1. Intel 1-Socket Server(s7200AP - KNL)
Event Data (RAW) |
Event Data 1 |
Event Data 2 |
Event Data 3 |
DIMM Slot |
a00000 |
a0=Correctable Error |
00= N/A |
00=CPU1-CH=A |
P1-DimmA |
a00001 |
a0=Correctable Error |
00= N/A |
01=CPU1-CH=B |
P1-DimmB |
a00002 |
a0=Correctable Error |
00= N/A |
02=CPU1-CH=C |
P1-DimmC |
a00003 |
a0=Correctable Error |
00= N/A |
03=CPU1-CH=D |
P1-DimmD |
a00004 |
a0=Correctable Error |
00= N/A |
04=CPU1-CH=E |
P1-DimmE |
a00005 |
a0=Correctable Error |
00= N/A |
05=CPU1-CH=F |
P1-DimmF |
2. Intel 2-Socket Server(Romley & Grantley)
Event Data (RAW) |
Event Data 1 |
Event Data 2 |
Event Data 3 |
DIMM Slot |
a00000 |
a0=Correctable Error |
00= N/A |
00=CPU1-CH=A-Dimm=1 |
P1-DimmA1 |
a00001 |
a0=Correctable Error |
00= N/A |
01=CPU1-CH=A-Dimm=2 |
P1-DimmA2 |
a00008 |
a0=Correctable Error |
00= N/A |
08=CPU1-CH=B-Dimm=1 |
P1-DimmB1 |
a00009 |
a0=Correctable Error |
00= N/A |
09=CPU1-Ch=B-Dimm=2 |
P1-DimmB2 |
a00110 |
a0=Correctable Error |
01= N/A |
10=CPU1-Ch=C-Dimm=1 |
P1-DimmC1 |
a00111 |
a0=Correctable Error |
01= N/A |
11=CPU1-Ch=C-Dimm=2 |
P1-DimmC2 |
a00118 |
a0=Correctable Error |
01= N/A |
18=CPU1-Ch=D-Dimm=1 |
P1-DimmD1 |
a00119 |
a0=Correctable Error |
01= N/A |
19=CPU1-Ch=D-Dimm=2 |
P1-DimmD2 |
a00020 |
a0=Correctable Error |
00= N/A |
20=CPU2-CH=A-Dimm=1 |
P2-DimmE1 |
a00021 |
a0=Correctable Error |
00= N/A |
21=CPU2-CH=A-Dimm=2 |
P2-DimmE2 |
a00028 |
a0=Correctable Error |
00= N/A |
28=CPU2-CH=B-Dimm=1 |
P2-DimmF1 |
a00029 |
a0=Correctable Error |
00= N/A |
29=CPU2-Ch=B-Dimm=2 |
P2-DimmF2 |
a00130 |
a0=Correctable Error |
01= N/A |
30=CPU2-Ch=C-Dimm=1 |
P2-DimmG1 |
a00131 |
a0=Correctable Error |
01= N/A |
31=CPU2-Ch=C-Dimm=2 |
P2-DimmG2 |
a00138 |
a0=Correctable Error |
01= N/A |
38=CPU2-Ch=D-Dimm=1 |
P2-DimmH1 |
a00139 |
a0=Correctable Error |
01= N/A |
39=CPU2-Ch=D-Dimm=2 |
P2-DimmH2 |
3. Intel 2-Socket Skylake Server(Purley)
Event Data (RAW) |
Event Data 1 |
Event Data 2 |
Event Data 3 |
DIMM Slot |
a00000 |
a0=Correctable Error |
00= DIMM1 |
00=CPU1-CH=A |
P1-DimmA1 |
a01000 |
a0=Correctable Error |
10= DIMM2 |
00=CPU1-CH=A |
P1-DimmA2 |
a00001 |
a0=Correctable Error |
00= DIMM1 |
01=CPU1-CH=B |
P1-DimmB1 |
a00002 |
a0=Correctable Error |
00= DIMM1 |
02=CPU1-Ch=C |
P1-DimmC1 |
a00003 |
a0=Correctable Error |
00= DIMM1 |
03=CPU1-Ch=D |
P1-DimmD1 |
a01003 |
a0=Correctable Error |
10= DIMM2 |
03=CPU1-Ch=D |
P1-DimmD2 |
a00004 |
a0=Correctable Error |
00= DIMM1 |
04=CPU1-Ch=E |
P1-DimmE1 |
a00005 |
a0=Correctable Error |
00= DIMM1 |
05=CPU1-Ch=F |
P1-DimmF1 |
a00010 |
a0=Correctable Error |
00= DIMM1 |
10=CPU2-CH=A |
P2-DimmA1 |
a01010 |
a0=Correctable Error |
10= DIMM2 |
10=CPU2-CH=A |
P2-DimmA2 |
a00011 |
a0=Correctable Error |
00= DIMM1 |
11=CPU2-CH=B |
P2-DimmB1 |
a00012 |
a0=Correctable Error |
00= DIMM1 |
12=CPU2-Ch=C |
P2-DimmC1 |
a00013 |
a0=Correctable Error |
00= DIMM1 |
13=CPU2-Ch=D |
P2-DimmD1 |
a01013 |
a0=Correctable Error |
10= DIMM2 |
13=CPU2-Ch=D |
P2-DimmD2 |
a00014 |
a0=Correctable Error |
00= DIMM1 |
14=CPU2-Ch=E |
P2-DimmE1 |
a00015 |
a0=Correctable Error |
00= DIMM1 |
14=CPU2-Ch=E |
P2-DimmF1 |